This invention relates to a method for integration of integrated circuit devices and more particularly to such a method for integration of photonic devices such as emitters and detectors.
Hybrid CMOS silicon (Si) and gallium arsenide (GaAs) chip technology, also known as flip-chip, allows for direct optical input/output from fiber bundles onto logic circuits. The electronics is not limited to silicon CMOS; the integration process would be the same using other silicon electronics, such as silicon-germanium or gallium arsenide. However, silicon CMOS is the most advanced today for many applications. The integration of optoelectronic devices with silicon is somewhat problematic for several reasons. Silicon does not have the band-gap structure that supports the generation of light. In addition, there has been very limited success in using epitaxial layers of III-V materials that do support light emission, such as gallium arsenide (GaAs) or indium phosphide (InP), in order to grow light emitting structures on silicon substrates because of the lattice mismatch. If a III-V device is to be attached to a silicon substrate it must be grown on a separate substrate comprised of an appropriate material and later attached to the silicon. It is desirable to have multiple types of photonic devices, such as emitters and detectors, integrated onto the same silicon substrate. These devices would be co-located on the silicon and possibly interdigitated. Having very different functions, different photonic devices also have very different epitaxial layer construction. It is not economically feasible for two such dissimilar devices to be grown on the same substrate and so it is necessary that separate growth steps be performed for each device type. Photonic devices that have been integrated onto the surface of a silicon substrate are prone to damage during processing of the wafer unless they are properly protected. To this end, underfills or flowable hardeners, such as epoxy resins or photoresists, are typically applied to the regions surrounding the devices and cured to provide a level of mechanical stability. However, when different photonic device types are integrated in separate process steps, repeated application and removal of the underfill has been required. Removal of epoxy resin is very undesirable as it creates residues that are exceedingly difficult to clean from the substrate surface.
It is therefore an object of this invention to provide an improved method of integration of integrated circuit devices.
It is a further object of this invention to provide such an improved method which allows different devices to be flip-chipped onto a chip or substrate.
It is a further object of this invention to provide such an improved method which allows different devices to be flip-chipped onto a chip or substrate without loss of necessary mechanical support.
It is a further object of this invention to provide such an improved method which decouples the chip fabrication from the device fabrication.
It is a further object of this invention to provide such an improved method which allows different photonic devices to be flip-chipped onto a silicon substrate without loss of necessary mechanical support.
The invention results from the realization that an improved method of integration of integrated circuit devices is achieved when a first set of devices including some dummy devices are constructed on a first chip then flip-chip bonded to a second chip and underfilled for mechanical support after which the dummy devices are removed with their underfill but the underfill mechanically supporting the remaining non-dummy first devices is preserved and a second set of devices on a third chip are then flip-chipped into the holes left by the removal of the dummy devices and underfilled once again.
This invention features a method for integration of integrated circuit devices including providing an array of first devices including dummy devices on first chip and providing an array of contacts on a second chip. The first devices are flip-chip bonded to the contacts and the voids between the chips interstitially of the first devices are filled with an underfill. The first devices are masked leaving exposed pre-selected dummy devices. The dummy devices are removed leaving an array of holes with contacts. A spaced array of second devices on a third chip is provided matching the array of holes. The second devices are flip-chip bonded to the contacts in the holes and the voids between the chips associated with the second devices are filled with an underfill.
In a preferred embodiment the devices may include photonic devices. The first and third chips may include gallium arsenide. The second chip may include silicon. The second chip may include an application specific integrated circuit. One of the first and second devices may include light emitters and the other light detectors. One of the first and second devices may include vertical cavity surface emitting lasers and the other p-i-n diodes. The dummy devices may be the same as the first devices. The first and third chips may include indium phosphide or indium gallium arsenide nitride. The second chip may include silicon germanium or gallium arsenide. The underfill may include an epoxy or a photoresist. The method may include removing the first chip except for the first devices and removing the third chip except for the second devices.